Qualification of Hardware Description Language Designs for Safety Critical Applications in Nuclear Power Plants

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dc.contributor.authorJohn, A. K.
dc.contributor.authorBhattacharjee, A. K.
dc.date.accessioned2021-01-29T09:23:27Z
dc.date.available2021-01-29T09:23:27Z
dc.date.issued2020
dc.description.divisionRCnDen
dc.format.extent4229 bytes
dc.format.mimetypetext/html
dc.identifier.sourceIEEE Transactions on Nuclear Science, 2020. Vol. 67 (3): pp. 502-507en
dc.identifier.urihttp://hdl.handle.net/123456789/22018
dc.language.isoenen
dc.subjectBounded model checkingen
dc.subjectformal verificationen
dc.subjectfield-programmable gate-array (FPGA) qualificationen
dc.subjectVHDLen
dc.titleQualification of Hardware Description Language Designs for Safety Critical Applications in Nuclear Power Plantsen
dc.typeArticleen

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