Qualification of Hardware Description Language Designs for Safety Critical Applications in Nuclear Power Plants

John, A. K.Bhattacharjee, A. K.2021-01-292021-01-292020IEEE Transactions on Nuclear Science, 2020. Vol. 67 (3): pp. 502-507http://hdl.handle.net/123456789/220184229 bytestext/htmlenBounded model checkingformal verificationfield-programmable gate-array (FPGA) qualificationVHDLQualification of Hardware Description Language Designs for Safety Critical Applications in Nuclear Power PlantsArticle