FPGA implementation of UDP/IP stack using TSE IP core and transfer data at 1 Gbps

Jain, D.Shrivastava, S.2020-03-192020-03-192017Advances in Intelligent Systems and Computing, 2017. Vol. 479: pp. 1103-1111http://hdl.handle.net/123456789/204814281 bytestext/htmlenTSE IP coreUDP/IP stackAltera Quartus IIQsysSignal Tap II analyzerSystem consoleFPGAFPGA implementation of UDP/IP stack using TSE IP core and transfer data at 1 GbpsArticle