Symbolic representation for analog realization of a family of fractional order controller structures via continued fraction expansion

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dc.contributor.authorPakhira, A.
dc.contributor.authorDas, Saptarshi
dc.contributor.authorPan, I.
dc.contributor.authorDas, Shantanu
dc.date.accessioned2015-12-15T08:07:08Z
dc.date.available2015-12-15T08:07:08Z
dc.date.issued2015
dc.description.divisionRCnDen
dc.format.extent4386 bytes
dc.format.mimetypetext/html
dc.identifier.sourceSA Transactions, 2015. Vol. 57: pp. 390-402en
dc.identifier.urihttp://hdl.handle.net/123456789/12088
dc.language.isoenen
dc.subjectAnalog realizationen
dc.subjectContinued fraction expansion(CFE)en
dc.subjectDomino-ladderen
dc.subjectFractional order controlleren
dc.subjectFO[PD] controlleren
dc.subjectFO lead–lag compensatoren
dc.subjectSymbolic realizationen
dc.titleSymbolic representation for analog realization of a family of fractional order controller structures via continued fraction expansionen
dc.typeArticleen

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