A design of high resolution, wide dynamic range Time-to-Digital Converter (TDC) ASIC, implemented in 0.35 mm commercial CMOS technology is presented. The ASIC features four channel TDC with an in-built calibration and Serial Peripheral Interconnect (SPI) slave interface. The TDC is based on the vernier ring oscillator method in order to achieve both high resolution and wide dynamic range. This TDCASIC is tested and found to have resolution of 127ps(LSB), dynamic range of 1.8 μs and precision(σ) of 74ps. The measured values of differential non-linearity (DNL) and integral non-linearity(INL)are350psand 300ps respectively.